I2C-bus repeater
Rev. 5 — 23 March 2012
i2c总线中继器
启5 - 2012年3月23日
The PCA9515A is a CMOS integrated circuit intended for application in I2C-bus and
SMBus systems.
While retaining all the operating modes and features of the I2C-bus system, it permits
extension of the I2C-bus by buffering both the data (SDA) and the clock (SCL) lines, thus
enabling two buses of 400 pF.
The I2C-bus capacitance limit of 400 pF restricts the number of devices and bus length.
Using the PCA9515A enables the system designer to isolate two halves of a bus, thus
more devices or longer length can be accommodated. It can also be used to run two
buses, one at 5 V and the other at 3.3 V or a 400 kHz and 100 kHz bus, where the
100 kHz bus is isolated when 400 kHz operation of the other is required.
Two or more PCA9515As cannot be put in series. The PCA9515A design does not
allow this configuration. Since there is no direction pin, slightly different ‘legal’ low voltage
levels are used to avoid lock-up conditions between the input and the output. A ‘regular
LOW’ applied at the input of a PCA9515A will be propagated as a ‘buffered LOW’ with a
slightly higher value. When this ‘buffered LOW’ is applied to another PCA9515A,
PCA9516A or PCA9518/A in series, the second PCA9515A, PCA9516A or PCA9518/A
will not recognize it as a ‘regular LOW’ and will not propagate it as a ‘buffered LOW’ again.
The PCA9510/A, PCA9511/A, PCA9512/A, PCA9513/A, PCA9514/A cannot be used in
series with the PCA9515A, PCA9516A or PCA9518/A, but can be used in series with
themselves since they use shifting instead of static offsets to avoid lock-up conditions.
The output pull-down of each internal buffer is set for approximately 0.5 V, while the input
threshold of each internal buffer is set about 0.07 V lower, when the output is internally
driven LOW. This prevents a lock-up condition from occurring.
PCA9515A是i2c总线和CMOS集成电路用于应用程序
SMBus系统。
,同时保留所有的操作模式和i2c总线系统的特性,它允许
扩展的i2c总线缓冲数据(SDA)和时钟(sci)线,因此
使两辆公交车400 pF。
i2c总线电容限制400 pF对设备和总线长度的数量限制。
使用PCA9515A使系统设计师隔离两部分总线,因此
可以容纳更多的设备或更长时间长度。它也可以用来运行两个
巴士,一个5 V,另一个在3.3 V或400 kHz和100 kHz巴士,在哪里
100千赫总线隔离其他400千赫操作时是必需的。
两个或两个以上PCA9515As不能放在系列。PCA9515A设计不
允许这个配置。因为没有方向销,“法律”低电压略有不同
水平是用来避免锁定条件之间的输入和输出。“常规
低的应用于输入PCA9515A将传播作为“缓冲”与低
略高的价值。当这个“缓冲低”应用于另一个PCA9515A,
PCA9516A或PCA9518 /串联,第二PCA9515A PCA9516A或PCA9518 /
不会承认它作为一个常规的低,不会传播它作为一个“缓冲低”了。
PCA9510 / A、PCA9511 / PCA9512 /,PCA9513 / PCA9514 /不能使用
系列与PCA9515A PCA9516A或PCA9518 /,但可以串联使用
因为他们使用转移而不是静态补偿,以避免锁定条件。
每个内部缓冲区设置的输出下拉约0.5 V,而输入
阈值的内部缓冲区设置约0.07 V低,当内部的输出
驱动的低。这可以防止锁定条件发生。